Kernel Configuration: Which Processor Family to choose for ‘Celeron M CPU 420’ (Core Solo)?
I am trying to build custom kernel (version 3.12.13) for my old laptop and I am unable to determine the Processor Family from the provided list.
( ) 486 ( ) 586/K5/5x86/6x86/6x86MX ( ) Pentium-Classic ( ) Pentium-MMX ( ) Pentium-Pro ( ) Pentium-II/Celeron(pre-Coppermine) ( ) Pentium-III/Celeron(Coppermine)/Pentium-III Xeon ( ) Pentium M ( ) Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon ( ) K6/K6-II/K6-III ( ) Athlon/Duron/K7 ( ) Opteron/Athlon64/Hammer/K8 ( ) Crusoe ( ) Efficeon ( ) Winchip-C6 ( ) Winchip-2/Winchip-2A/Winchip-3 ( ) AMD Elan ( ) GeodeGX1 ( ) GeodeGX1 ( ) Geode GX/LX ( ) CyrixIII/VIA-C3 ( ) VIA C3-2 (Nehemiah) ( ) VIA C7 ( ) Core 2/newer Xeon ( ) Intel Atom
According to this guide, 420 Celeron-M processors are Core Solo based, but I do not know which processor family should I select from above list. My cpuinfo:
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 14 model name : Intel(R) Celeron(R) M CPU 420 @ 1.60GHz stepping : 8 microcode : 0x39 cpu MHz : 1596.033 cache size : 1024 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 10 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov clflush dts acpi mmx fxsr sse sse2 ss tm pbe nx constant_tsc up arch_perfmon bts aperfmperf pni monitor tm2 xtpr pdcm dtherm bogomips : 3192.06 clflush size : 64 cache_alignment : 64 address sizes : 32 bits physical, 32 bits virtual power management:
CPU Architectures¶
These books provide programming details about architecture-specific implementation.
- ARC architecture
- Linux kernel for ARC processors
- Feature status on arc architecture
- ARM Linux 2.6 and upper
- Booting ARM Linux
- Cluster-wide Power-up/power-down race avoidance algorithm
- Interface for registering and calling firmware-specific operations for ARM
- Interrupts
- Kernel mode NEON
- Kernel-provided User Helpers
- Kernel Memory Layout on ARM Linux
- Memory alignment
- ARM TCM (Tightly-Coupled Memory) handling in Linux
- Kernel initialisation parameters on ARM Linux
- Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
- The Unified Extensible Firmware Interface (UEFI)
- vlocks for Bare-Metal Mutual Exclusion
- Porting
- Feature status on arm architecture
- SoC-specific documents
- ACPI Tables
- Activity Monitors Unit (AMU) extension in AArch64 Linux
- ACPI on Arm systems
- Asymmetric 32-bit SoCs
- Booting AArch64 Linux
- ARM64 CPU Feature Registers
- ARM64 ELF hwcaps
- HugeTLBpage on ARM64
- crashkernel memory reservation on arm64
- Legacy instructions
- Memory Layout on AArch64 Linux
- Memory Tagging Extension (MTE) in AArch64 Linux
- Perf
- Pointer authentication in AArch64 Linux
- Kernel page table dump
- Silicon Errata and Software Workarounds
- Scalable Matrix Extension support for AArch64 Linux
- Scalable Vector Extension support for AArch64 Linux
- AArch64 TAGGED ADDRESS ABI
- Tagged virtual addresses in AArch64 Linux
- Feature status on arm64 architecture
- Linux kernel release for the IA-64 Platform
- Memory Attribute Aliasing on IA-64
- EFI Real Time Clock driver
- IPF Machine Check (MC) error inject tool
- Light-weight System Calls for IA-64
- IRQ affinity on IA64 platforms
- An ad-hoc collection of notes on IA64 MCA and INIT processing
- Serial Devices
- Feature status on ia64 architecture
- 1. Introduction to LoongArch
- 2. Booting Linux/LoongArch
- 3. IRQ chip model (hierarchy) of LoongArch
- 4. Feature status on loongarch architecture
- Command Line Options for Linux/m68k
- Amiga Buddha and Catweasel IDE Driver
- Feature status on m68k architecture
- 1. BMIPS DeviceTree Booting
- 2. Ingenic JZ47xx SoCs Timer/Counter Unit hardware
- 3. Feature status on mips architecture
- 1. Linux on the Nios II architecture
- 2. Feature status on nios2 architecture
- OpenRISC Linux
- TODO
- Feature status on openrisc architecture
- PA-RISC Debugging
- Register Usage for Linux/PA-RISC
- Feature status on parisc architecture
- NUMA resource associativity
- DeviceTree Booting
- The PowerPC boot wrapper
- CPU Families
- CPU Features
- Coherent Accelerator Interface (CXL)
- Coherent Accelerator (CXL) Flash
- DAWR issues on POWER9
- DEXCR (Dynamic Execution Control Register)
- DSCR (Data Stream Control Register)
- PCI Bus EEH Error Recovery
- POWERPC ELF HWCAPs
- ELF Note PowerPC Namespace
- Firmware-Assisted Dump
- HVCS IBM «Hypervisor Virtual Console Server» Installation Guide
- IMC (In-Memory Collection Counters)
- CPU to ISA Version Mapping
- KASLR for Freescale BookE32
- Linux 2.6.x on MPC52xx family
- Hypercall Op-codes (hcalls)
- PCI Express I/O Virtualization Resource on Powerenv
- PMU Event Based Branches
- Ptrace
- Freescale QUICC Engine Firmware Uploading
- Power Architecture 64-bit Linux system call ABI
- Transactional Memory support
- Protected Execution Facility
- Virtual Accelerator Switchboard (VAS) userspace API
- VCPU Dispatch Statistics
- Feature status on powerpc architecture
- ACPI on RISC-V
- Boot image header in RISC-V Linux
- Virtual Memory Layout on RISC-V Linux
- RISC-V Hardware Probing Interface
- arch/riscv maintenance guidelines for developers
- RISC-V Linux User ABI
- Vector Extension Support for RISC-V Linux
- Feature status on riscv architecture
- Linux for S/390 and zSeries
- IBM 3270 Display System support
- S/390 driver model interfaces
- Linux API for read access to z/VM Monitor Records
- IBM s390 QDIO Ethernet Driver
- S390 Debug Feature
- Adjunct Processor (AP) facility
- VFIO AP Locks Overview
- vfio-ccw: the basic infrastructure
- The s390 SCSI dump tool (zfcpdump)
- S/390 common I/O-Layer
- S/390 PCI
- ibm 3270 changelog
- ibm 3270 config3270.sh
- Feature status on s390 architecture
- DeviceTree Booting
- Adding a new board to LinuxSH
- Notes on register bank usage in the kernel
- Feature status on sh architecture
- Memory Management
- Machine Specific Interfaces
- Busses
- Steps for sending ‘break’ on sunhv console
- Application Data Integrity (ADI)
- Oracle Data Analytics Accelerator (DAX)
- Feature status on sparc architecture
- 1. The Linux/x86 Boot Protocol
- 2. DeviceTree Booting
- 3. x86 Feature Flags
- 4. x86 Topology
- 5. Kernel level exception handling
- 6. Kernel Stacks
- 7. Kernel Entries
- 8. Early Printk
- 9. ORC unwinder
- 10. Zero Page
- 11. The TLB
- 12. MTRR (Memory Type Range Register) control
- 13. PAT (Page Attribute Table)
- 14. Hardware-Feedback Interface for scheduling on Intel Hardware
- 15. x86 IOMMU Support
- 16. Intel(R) TXT Overview
- 17. AMD Memory Encryption
- 18. AMD HSMP interface
- 19. Intel Trust Domain Extensions (TDX)
- 20. Page Table Isolation (PTI)
- 21. Microarchitectural Data Sampling (MDS) mitigation
- 22. The Linux Microcode Loader
- 23. User Interface for Resource Control feature
- 24. TSX Async Abort (TAA) mitigation
- 25. Bus lock detection and handling
- 26. USB Legacy support
- 27. i386 Support
- 28. x86_64 Support
- 29. In-Field Scan
- 30. Shared Virtual Addressing (SVA) with ENQCMD
- 31. Software Guard eXtensions (SGX)
- 32. Feature status on x86 architecture
- 33. x86-specific ELF Auxiliary Vectors
- 34. Using XSTATE features in user space applications
- Atomic Operation Control (ATOMCTL) Register
- Passing boot parameters to the kernel
- MMUv3 initialization sequence
- Feature status on xtensa architecture