How do I shut up make when it doesn’t need to do anything?
How I stop make from saying make: Nothing to be done for ‘all’. or make: ‘file’ is up to date ? I’d like my build to be silent when it’s not doing anything — there are other places where echo is called to track build progress, so this message is just cluttering things up. I am currently silencing it like this:
all: dependency1 dependency2 @: Something tells me there must be a better way. Any ideas? Edit: I would like to keep command echo working when it does need to build something, however. A good example of what I’m hoping for is along the lines of —no-print-directory , but I can’t find any other flags to shut up selected messages.
If you can change the internals of the makefile but not the command line that invokes it, how about running make a second time from within: «target: @$(MAKE) -s realTarget». I’ve tested this and it works.
@Beta, that’s a lot like how the system works right now. I do want to stay away from -s though, since it silences the builds where something does need to happen.
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I will, unfortunately, have to not use this method. When debugging the build system, it’s a big pain to turn off a flag, but easy to delete an @ on a line. Historical reasons. (read: garbage build system).
So after a couple days of reading around the web, it looks like there isn’t any better way than what I’m doing. Some people recommended something along the lines of:
all: dependency1 dependency2 | silent silent: @: That is, just depending on the silent target would be enough to quiet things down. Since I didn’t come up with any other workable solutions, I’m going with what I have.
The advantage of doing it this way is that nothing is printed when there is nothing to do but make produces the normal output when it does need to proceed.
I think that will make what is already a not great system not much better; certainly the solution I’m currently using is less invasive. A null build currently takes about 90 seconds, so doubling that probably isn’t going to go over well with other developers.
To quote (from memory) from the old make(1) man page, BUGS section: There are some things you can’t get make to shut up about. Meanwhile, the -s or —silent option may help.
You can set the -s commandline argument to make in the makefile itself, by setting MAKEFLAGS. Nothing is printed unless you explicitely print it, so I use the following makefile to echo invoked commands.
MAKEFLAGS += -s PROJECT = progname CC = g++ SDIR = src ODIR = obj BDIR = bin IDIR = include OBJS = $(patsubst $(SDIR)/%.cc,$(ODIR)/%.o,$(wildcard $(SDIR)/*.cc)) .PHONY: all debug clean all: $(BDIR)/$(PROJECT) debug: CFLAGS += -g -Wall -Wextra debug: all $(BDIR)/$(PROJECT): $(OBJS) @mkdir -p $(BDIR) @echo LINKING $< @$(CC) -o $@ $(OBJS) -I$(IDIR) $(ODIR)/%.o: $(SDIR)/%.cc @mkdir -p $(ODIR) @echo "COMPILING $ Removing the MAKEFLAGS variable will print all invoked commands. The Makefile compiles any c++ project where source files (with .cc extension) are put into the src directory and header files are put into the include directory.
Nothing to be done for "Makefile"
I am supposed to write a Makefile for a project I need to do. I have it all done but when I try to do it, I get the following output:
########################################################### # Makefile for XXXXX # name1, name2 # account1, account2 ########################################################### EXEC = a1 CC = /opt/SUNWspro/bin/cc $(EXEC): $(CC) -o $(EXEC) a1.cpp a1.h a1.sic rm -f *.o clean: rm -f *.o core diss $(EXEC) #######################[ EOF: Makefile ]################### /opt/SUNWspro/bin/cc -o a1 a1.cpp a1.h a1.sic ld: fatal: file a1.cpp: unknown file type ld: fatal: file processing errors. No output written to a1 make: *** [a1] Error 2 You're trying to compile C++ code with a C compiler; this does not work well. Use a C++ compiler, probably /opt/SUNWspro/bin/CC (all caps). You don't normally list header files on the compiler command line. And I'm not sure who knows what a .sic file is.
Well, if the .sic file is translated for you, fine. The .h file should probably not be on the command line. There's a chance it may be recognized and rendered harmless, but if there's a problem with an unrecognized file type for a1.h , then you know it wasn't OK. I've not seen .sic used for assembler. If the Sun compiler recognizes it, great. If not, you've some more work to do in the makefile (possibly adding rules for converting .sic assembler to .o object files.
A makefile automates tasks you would otherwise perform from the command line. So before you write a makefile to do something, you must know how to do it without a makefile. Try to build a1 with a command like cc -o a1 a1.cpp a1.sic , and don't try to write a makefile until that works perfectly.
1 Answer 1
Are you typing make Makefile for some reason? Don't. Just type make . make a1 or make -f Makefile will work for your situation, too, but why bother with the extra typing?
As an aside, it's a bit weird to include header files on your compile line. Also, your makefile doesn't specify any dependencies, which is kind of the whole reason to have one in the first place.
Edit: to answer your new question, don't compile C++ code with a C compiler. That said, I'm not sure about the link error you're getting. Is a1.cpp not a normal source file (type file a1.cpp to find out)?
It seems like you are having very fundamental problems. Maybe starting with a good beginner book would be useful?
make: Nothing to be done for `all'
That's not an error, it just means hello is up to date. Change clean to rm -f *.o hello before it does something unexpected, then run make clean all and see if that works.
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Sometimes "Nothing to be done for all" error can be caused by spaces before command in makefile rule instead of tab. Please ensure that you use tabs instead of spaces inside of your rules.
Please see the GNU make manual for the rule syntax description: https://www.gnu.org/software/make/manual/make.html#Rule-Syntax
obj-m += hello.o all: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules clean: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
In the context of parent-child makefiles, sometimes "Nothing to be done for all" error can be caused by child targets being incorrectly marked declared .PHONY in the parent Makefile.
I had all : src/server/mod_wsgi.la , which I changed to all : src/server/mod_wsgi.la . I now get the error : make: execvp: src/server/mod_wsgi.la: Permission denied Makefile:29: recipe for target 'all' failed make: *** [all] Error 127 after sudo make . Any help?
@cryanbhu please make sure your rules are following the rule syntax: gnu.org/software/make/manual/make.html#Rule-Syntax.
Remove the hello file from your folder and try again.
The all target depends on the hello target. The hello target first tries to find the corresponding file in the filesystem. If it finds it and it is up to date with the dependent files—there is nothing to do.
obj-m += hello.o all: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules clean: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
When you just give make, it makes the first rule in your makefile, i.e "all". You have specified that "all" depends on "hello", which depends on main.o, factorial.o and hello.o. So 'make' tries to see if those files are present.
If they are present, 'make' sees if their dependencies, e.g. main.o has a dependency main.c, have changed. If they have changed, make rebuilds them, else skips the rule. Similarly it recursively goes on building the files that have changed and finally runs the top most command, "all" in your case to give you a executable, 'hello' in your case.
If they are not present, make blindly builds everything under the rule.
Coming to your problem, it isn't an error but 'make' is saying that every dependency in your makefile is up to date and it doesn't need to make anything!
Make is behaving correctly. hello already exists and is not older than the .c files, and therefore there is no more work to be done. There are four scenarios in which make will need to (re)build:
- If you modify one of your .c files, then it will be newer than hello , and then it will have to rebuild when you run make.
- If you delete hello , then it will obviously have to rebuild it
- You can force make to rebuild everything with the -B option. make -B all
- make clean all will delete hello and require a rebuild. (I suggest you look at @Mat's comment about rm -f *.o hello
Using the comment from Paul R, I found that
I think you missed a tab in 9th line. The line following all:hello must be a blank tab. Make sure that you have a blank tab in 9th line. It will make the interpreter understand that you want to use default recipe for makefile.
That is not an error; the make command in unix works based on the timestamps. I.e let's say if you have made certain changes to factorial.cpp and compile using make then make shows the information that only the cc -o factorial.cpp command is executed. Next time if you execute the same command i.e make without making any changes to any file with .cpp extension the compiler says that the output file is up to date. The compiler gives this information until we make certain changes to any file.cpp .
The advantage of the makefile is that it reduces the recompiling time by compiling the only files that are modified and by using the object ( .o ) files of the unmodified files directly.
I arrived at this peculiar, hard-to-debug error through a different route. My trouble ended up being that I was using a pattern rule in a build step when the target and the dependency were located in distinct directories. Something like this:
foo/apple.o: bar/apple.c $(FOODEPS) %.o: %.c $(CC) $< -o $@ I had several dependencies set up this way, and was trying to use one pattern recipe for them all. Clearly, a single substitution for "%" isn't going to work here. I made explicit rules for each dependency, and I found myself back among the puppies and unicorns!
foo/apple.o: bar/apple.c $(FOODEPS) $(CC) $< -o $@ I was trying to install libuv on Ubuntu and i also got the error make: Nothing to be done for 'all' . As i see it, using make gives two ways to solve the problem, one for check and one for install. But i found a workaround still use the sudo make check command - it helps to read all the error messages before deciding on further actions. Basically, i've introduced a regression that makes the update workaround inefficient. This error comes from make however, the workaround from install fixes this, just try to run sudo make install and see what happens. The make command will be a local optimization at the expense of the overall result of check/install - c'est ma façon de parler. I believe i have narrowed down the problem considerably: in the first case after check i have " FAIL: test/run-tests " and in the second after install i get "specify the full pathname of the library, or use the '-LLIBDIR'" This argument to check/install can be a list object to store information about completed installations. So install reports partial success when nothing actually happened.
Try running the commands from root:
cd your_program sh autogen.sh ./configure make make check make install And then he writes that the installation was successful:
Libraries have been installed in: /usr/local/lib In your case, I strongly feel the only and simple problem you had is that you only preprocessed your app. You did so by having the flag -c under CFLAGS .
You are wrong. -c actually creates an object file. This is not just preprocessing. Running just the preprocessor is -E . BTW - "feeling" is not a valid cause for posting a quality answer. Other people already pointed to the real issue that the program is most probably already built and hence make has nothing left to do.
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